1. FIELD OF THE INVENTION
The present invention relates to a bond pad layout for an integrated circuit die.
2. DESCRIPTION OF RELATED ART
Integrated circuits are assembled into a package that is mounted to a printed circuit board. The integrated circuit die is typically supported by a substrate that has a plurality of internal bond fingers that are coupled to corresponding bond pads of the die. The substrate contains internal routing that connects the bond fingers to external contacts that are soldered to the printed circuit board. The bond fingers are typically connected to the die bond pads by bond wires.
FIG. 1 shows a conventional bond pad layout of an integrated circuit die 1. The bond pads 2 are arranged into two staggered rows that are coupled to the circuitry of the integrated circuit by lead traces 3. The lead traces 3 connected to the outer bond pads are routed between the inner bond pads. Routing the lead traces between the inner bond pads limits the spacing pitch of the bond pads and the current carrying capability of the traces. It is generally desirable to minimize the pitch of the bond pads to increase the number of bond pads, and/or reduce the size of the die.
The bond wires are typically attached to the bond pads with an automated bonding machine. The bonding machine exerts a certain amount of pressure on the bond pads during the bonding process. It is imperative that the bond pads and supporting die structure withstand the forces created by the automated bonding machine. Any cracks or other material deformation in the die may effect the operation of the integrated circuit. It would therefore be desirable to provide a bond pad structure that minimizes the spacing pitch of the pads and has enough structural integrity to withstand the forces exerted during an automated bonding process.